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NCP5901
VCC
PWM
BST
PWM
EN
VCC
Logic
1
FLAG
9
(Top View)
Figure 1. Pin Diagram
DRVH
SW
GND
DRVL
BST
DRVH
Anti ? Cross
Conduction
VCC
SW
DRVL
EN
Fault
UVLO
Pre ? OV
ZCD
Detection
Figure 2. Block Diagram
Table 1. P in Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
Symbol
BST
PWM
EN
VCC
DRVL
GND
SW
DRVH
FLAG
Description
Floating bootstrap supply pin for high side gate driver. Connect the bootstrap capacitor between this pin
and the SW pin.
Control input. The PWM signal has three distinctive states: Low = Low Side FET Enabled, Mid = Diode
Emulation Enabled, High = High Side FET Enabled.
Logic input. A logic high to enable the part and a logic low to disable the part.
Power supply input. Connect a bypass capacitor (0.1 m F) from this pin to ground.
Low side gate drive output. Connect to the gate of low side MOSFET.
Bias and reference ground. All signals are referenced to this node (QFN Flag).
Switch node. Connect this pin to the source of the high side MOSFET and drain of the low side MOSFET.
High side gate drive output. Connect to the gate of high side MOSFET.
Thermal flag. There is no electrical connection to the IC. Connect to ground plane.
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